Логичка синтеза — разлика између измена

Садржај обрисан Садржај додат
м Робот: обликовање ISBN-а
м ispravke
Ред 63:
* -{''A Consistent Approach in Logic Synthesis for FPGA Architectures'', by Burgun Luc, Greiner Alain, and Prado Lopes Eudes, Proceedings of the international Conference on Asic (ASICON), Pekin, October 1994, pp. 104–107.}-
* {{Cite book |ref= harv|editor=Laung-Terng Wang, Yao-Wen Chang, Kwang-Ting Cheng|title=Electronic design automation: synthesis, verification, and test|year=2009|author=Jie-Hong (Roland) Jiang, Srinivas Devadas|chapter=Logic synthesis in a nutshell|publisher=Morgan Kaufmann|isbn=978-0-12-374364-0|id=chapter 6}}
* {{Cite book |ref= harv|last1=Hachtel|first1=Gary D.|last2=Somenzi|first2=Fabio|title=Logic synthesis and verification algorithms|year=1996|publisher=Springer|idisbn=ISBN 978-0-7923-9746-5}} also as published as softcover ISBN 978-0-387-31004-6 in 2006
* {{Cite book |ref= harv|editor=Soha Hassoun, Tsutomu Sasao|title=Logic synthesis and verification|year=2002|publisher=Kluwer|isbn=978-0-7923-7606-4}}
{{refend}}